This invention relates to a code generator capable of executing a phase shift of a PN (pseudo noise) sequence for generating an arbitrary phase shift amount, a communication unit using the code generator, and a code generation method. More particularly, the invention relates to a code generator capable of generating an arbitrary phase shift amount without performing cyclic shift operation, a communication unit using the code generator, and a code generation method.
Hitherto, in a spread spectrum communication system, it has been necessary to calculate the phase shift amount of a PN sequence at high speed. Then, as a calculation method of the phase shift amount of a PN sequence in a related art, the cyclic shift operation and matrix operation have been executed in combination.
FIG. 11 is a drawing to show a code generator in a related art. In FIG. 11, the code generator comprises shift registers 1111 to 1114 for receiving data (bit data) from the preceding stage and shifting the data to the following stage, feedback taps 1115 being placed between the shift registers 1111 and 1112 and between the shift register 1111 and the output of the shift register 1114, and a NOR circuit 1110 for exclusively ORing data from the feedback taps 1115.
Thus, in the code generator in the related art, the structure of a generated PN sequence is determined by the number of stages of the shift registers and the positional relationship of the feedback taps, as shown in FIG. 11. Data with four bits other than xe2x80x9c0xe2x80x9d is stored in each register as an initial state, then the shift registers 1111 to 1114 are cyclically shifted, whereby the PN sequence is generated.
Here, the cyclic shift operation can be represented by matrix operation. That is, the data in the initial state is stored in each shift register 1111 to 1114 and the shift registers 1111 to 1114 are cyclically shifted, then the value stored in each shift register 1111 to 1114 can be found by performing determinant operation. For example, letting the number of times the cyclic shift operation is performed be N, the value of each register in the initial state be A, and determinant be X(N), shift register value B after the cyclic shift operation can be found by the following equation.
B=X(N)A
As shown above, the code generator in the related art generates PN sequence output of an arbitrary phase shift amount by performing the cyclic shift operation and operation of a specific shift amount in the combination circuit in combination.
However, the code generator in the related art as shown in FIG. 11 generates an arbitrary phase shift amount by using the matrix operation combination circuit and the cyclic shift operation of the shift register in combination, thus the circuit scale of the matrix operation combination circuit grows to perform the shift operation at high speed; this is a problem.
On the other hand, if the circuit scale is lessened, the cyclic shift operation needs to be performed more times, thus the operation of the code generator becomes low-speed operation; this is a problem.
It is therefore an object of the invention to provide a code generator capable of performing the shift operation at high speed on a small circuit scale, a communication unit using the code generator, and a code generation method.
To the end, according to a first aspect of the invention, there is provided a code generator for generating code data responsive to an arbitrary phase shift amount, the code generator comprising storage means for storing an initial value or an operation value of the code data, a plurality of matrix operation means each for performing matrix operation with a weight responsive to a predetermined phase shift amount, unit matrix operation means for performing unit matrix operation, selection means being connected between the storage means and the plurality of matrix operation means and the unit matrix operation means for selecting one of the plurality of matrix operation means or the unit matrix operation means, and control means for controlling the selection means and the storage means, characterized in that the selection means selects one of the plurality of matrix operation means or the unit matrix operation means in response to a selection signal from the control means and connects the selected operation means to the storage means, and that the storage means outputs the stored data in response to a storage signal from the control means.
Combination circuits (matrix operation weights) are provided in response to the shift count, whereby it is made possible to perform arbitrary phase shift amount calculation of a PN sequence at high speed on a small and compact circuit scale.
To the end, according to a second aspect of the invention, there is provided a code generator for generating code data responsive to an arbitrary phase shift amount, the code generator comprising storage means for storing an initial value or an operation value of the code data, a plurality of matrix operation means each for performing matrix operation with a weight responsive to a predetermined phase shift amount, selection means being connected between the storage means and the plurality of matrix operation means for selecting one of the plurality of matrix operation means, and control means for controlling the selection means and the storage means, characterized in that the selection means selects one of the plurality of matrix operation means in response to a selection signal from the control means and connects the selected matrix operation means to the storage means, and that the storage means outputs the stored data in response to a storage signal from the control means.
Since output of the register is controlled in response to the bit of the phase shift amount, the shift operation can be performed at high speed on a smaller circuit scale.
In the code generator, the control means may generate the storage signal in response to the arbitrary phase shift amount. At this time, the control means may generate the selection signal in response to the arbitrary phase shift amount. Further, the control means can also output the storage signal after outputting the selection signal. The matrix operation means may perform the matrix operation with the value corresponding to a predetermined code position, of the code string provided by binarizing the arbitrary phase shift amount as the matrix operation weight. Further, the storage means can also comprise a plurality of storage elements each for storing one-bit data.
The code generator can be applied to a communication unit comprising reception means for processing a reception signal and transmission means for processing a transmission signal. A plurality of the reception means and the transmission means are provided for each predetermined frequency band of the signals to be processed and the reception means and the transmission means for processing the signals on the same frequency band can also use the same code generator. Further, the communication unit can be applied to a communication system for transmitting and receiving data.
Since the communication unit uses the code generator provided with the combination circuits (matrix operation weights) in response to the shift count, the shift operation can be performed at high speed on a small circuit scale, and the communication unit can be made more compact with high performance.
To the end, according to a third aspect of the invention, there is provided a code generation method for generating code data responsive to an arbitrary phase shift amount, the code generation method comprising the steps of storing data, executing a count in response to the number of clocks, selecting one bit of a binary bit string of the arbitrary phase shift amount in order starting at the least or most significant bit for each count, generating a selection signal in response to the value of the selected bit, performing the matrix operation responsive to the selection signal on the stored data, and replacing the stored data with the operation result data.
To the end, according to a fourth aspect of the invention, there is provided a code generation method for generating code data responsive to an arbitrary phase shift amount, the code generation method comprising the steps of storing data, executing a count in response to the number of clocks, selecting one bit of a binary bit string of the arbitrary phase shift amount in order starting at the least or most significant bit for each count, generating a selection signal and a storage signal in response to the value of the selected bit, determining the matrix operation responsive to the selection signal, determining whether or not the matrix operation responsive to the selection signal is to be performed on the stored data based on the storage signal, and if the matrix operation is performed on the data, replacing the stored data with the operation result data.
At this time, the steps of the step of executing a count in response to the number of clocks to the step of replacing the stored data with the operation result data may be repeated until processing is performed for all bits of the binary bit string of the arbitrary phase shift amount.